1. Field of the Invention
Embodiments of the present invention relate to circuits. More specifically, embodiments of the present invention relate to a low-power, fast-startup oscillator with digital feedback control.
2. Related Art
Circuit designers have struggled to design a simple and efficient low-power crystal oscillator that can provide a startup time of less than 1 ms as is required in certain electronic devices (e.g., universal serial bus (USB) devices). Such an oscillator is difficult to design because the conditions for sustaining oscillations are very different from the conditions required to initiate oscillations within the required startup time.
FIG. 1A presents a circuit diagram illustrating an oscillator circuit. Such oscillator circuits may only need 100 μA of bias current to sustain oscillations (where the oscillator loop gain>1), but may need in excess of 10 mA of bias current in order to commence oscillation in less than 1 ms. (Note that with the bias current of 10 mA, the magnitude of the oscillations produced by the oscillator circuit eventually becomes very large, so the 10 mA bias current cannot be sustained in most oscillator circuits.)
In order to avoid the need to design oscillator circuits that meet specific startup timing requirements, some circuit designers have proposed leaving the oscillator circuit always “on,” even when the oscillator circuit is not required to be on (e.g., during the “suspend” state for a USB device). Although simple, this type of design consumes an excessive amount of power.
Some circuit designers have suggested using an automatic gain control (AGC) loop to control the magnitude of the oscillations in the oscillator circuit in order to meet the 1 ms startup timing requirement. For example, FIG. 1B presents a circuit diagram illustrating an oscillator circuit with such an AGC loop. The AGC loop includes an analog peak detector and a low-bandwidth operational amplifier (op-amp) that controls a variable current source. When the oscillator is powered on, the analog peak detector increases the current provided by the variable current source until the magnitude of the oscillations output by the oscillator increases beyond a predefined limit (i.e., the reference voltage). When the oscillation amplitudes surpasses the predefined limit, the analog peak detector reduces the current provided by the variable current source such that the oscillation amplitude matches that of the reference voltage. This technique adjusts the startup time by monitoring the gain of the amplifier and adjusting the bias current accordingly.
Unfortunately, in the oscillator circuit with the AGC loop, the speed of the ramping of the current must be limited or else the AGC loop itself can oscillate. If the current cannot be ramped quickly, the oscillator circuit may not be able to meet the required startup time without using very large amplifying devices. Moreover, the AGC loop is an analog loop and hence is sensitive to noise coupling which can cause increased jitter. Furthermore, the time-constants of the loop are affected by process, voltage, and temperature, which can cause the startup time to vary.
Hence, what is needed is an oscillator circuit without the above-described problems.